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NTE861 Integrated Circuit Quad, Normally Open, SPST JFET Analog Switch w/Disable
Description: The NTE861 is a monolithic combination of bipolar and JFET technology producing a one chip quad JFET switch. A unique circuit technique is employed to maintain a constant resistance over the analog voltage range of 10V. The input is designed to operate from minimum TTL levels, and switch operation also ensures a break-before-make action. Features: D Analog signals are not loaded D Constant "ON" resistance for signals up to 10V and 100kHz D Pin compatible with CMOS switches with the advantage of blow out free handling D Small signal analog signals to 50MHz D Break-before-make action D High open switch isolation at 1.0MHz D Low leakage in "OFF" state D TTL, DTL, RTL compatibility D Single disable pin opens all switches in package This device operates from a 15V supply and swings a 10V analog signal. The JFET switches are designed for applications where a dc to medium frequency analog signal needs to be controlled. Absolute Maximum Ratings: Positive Supply-Negative Supply (VCC -VEE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE VR VCC Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VR -4.0V VIN VR +6.0V Analog Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE VA VCC +6V; VA VEE +36V Analog Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IA < 20mA Power Dissipation (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150C Typical Thermal Resistance, Junction-to-Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300C Note 1 For operating at high temperature this device must be derated based on a +100C maximum junction temperature and a thermal resistance of +150C/W.
Electrical Characteristics: (Note 2)
Parameter "ON" Resistance "ON" Resistance Matching Analog Range Leakage Current in "ON" Condition Source Current in "OFF" Condition Drain Current in "OFF" Condition Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Input Current Logical "0" Input Current Delay Time "ON" Delay Time "OFF" Break-Before-Make Source Capacitance Drain Capacitance Active Source and Drain Capacitance "OFF" Isolation Crosstalk Analog Slew Rate Disable Current Negative Supply Current Reference Supply Current Positive Supply Current Symbol RON RON Match VA IS(ON) + ID(ON) + IS(OFF) ID(OFF) VINH VINL IINH IINL tON tOFF tON - tOFF CS(OFF) CD(OFF) CS(ON) + CD(ON) + ISO(OFF) CT SR IDIS IEE IR ICC VIN = 5V VIN = 0.8V VS = 10V, TA = +25C VS = 10V, TA = +25C VS = 10V, TA = +25C Switch "OFF", VS = 10V, TA = +25C Switch "OFF", VD = 10V, TA = +25C Switch "ON", VS = VD = 10V, TA = +25C TA = +25C, Note 3 TA = +25C, Note 3 TA = +25C, Note 4 Note 5 All Switches "OFF", VS = 10V TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C Switch "ON", VS = VD = 10V Switch "OFF", VS = +10V, VD = -10V TA = +25C TA = +25C TA = +25C Test Conditions VA = 0, ID = 1mA TA = +25C TA = +25C Min - - - 10 - - - - - - 2.0 - - - - - - - - - - - - - - - - - - - - - - Typ 150 200 10 11 0.3 3 0.4 3 0.1 3 - - 3.6 - - - 500 90 80 4.0 3.0 5.0 -50 -65 50 0.6 0.9 4.3 6.0 2.7 3.8 7.0 9.8 Max Unit 250 350 50 - 10 30 10 30 10 30 - 0.8 40 100 0.1 1.0 - - - - - - - - - 1.5 2.3 7.0 10.5 5.0 7.5 9.0 13.5 V nA nA nA nA nA nA V V A A A A ns ns ns pF pF pF dB dB V/s mA mA mA mA mA mA mA mA
Note 2. VCC = +15V, VEE = -15V, VR = 0V, and limits apply for -25C TA +85C unless otherwise specified. Note 3. These parameters are limited by the pin to pin capacitance of the package. Note 4. This is the analog signal slew rate above which the signal is distorted as a result of finite internal slew rates. Note 5. All switches in the device are turned "OFF" by saturating a transistor at the disable node. The delay times will be approximately equal to the tON or tOFF plus the delay introduced by the external transistor.
Pin Connection Diagram
Input 1 1 D1 2 S1 3 VR 4 (-) VEE 5 S2 6 D2 7 Input 2 8
16 Input 4 15 D 4 14 S 4 13 Disable 12 (+) VCC 11 S 3 10 D 3 9 Input 3
16
9
1
8
.870 (22.0) Max
.260 (6.6) Max .200 (5.08) Max
.100 (2.54) .700 (17.78)
.099 (2.5) Min

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